DESIGN AND COMPARATIVE ANALYSIS OF 6T SRAM BITCELL USING 45NM, 90NM AND 180NM TECHNOLOGY

Abstract

SRAM has good storage density and fast access time which made it a crucial component in VLSI chips. Due to its ease in usage, minimal standby leakage, SRAM’s are widely used in many applications. The recent demands for highly secure and reliable user systems made it useful everywhere in recent times not only in communication applications but also in Transportation applications, Industrial applications, Medical/Healthcare applications, Automobile applications etc.. A CMOS SRAM cell uses less power and requires less read and write time. This study uses a 6T SRAM cell that consumes less power, space and time to read and write data. SRAM is a type of random-access memory, which stores data for longer duration without refreshing the circuits. In this paper the performance analysis of 6T SRAM in 180nm, 90nm and 45nm technology in terms of write time (propagation delay) using cadence tool is studied. The aim is to develop a 6T SRAM design which yield less delay because most of the area on memory chip is consumed by SRAM cell.